Using atomic layer deposition might enable engineers to design transistors having thinner oxide and metal layers for the gates, possibly consuming far less electricity than silicon devices.
"A thinner dielectric layer means speed goes up and voltage requirements go down," Ye said.
The work is funded by the National Science Foundation and the Semiconductor Research Corp. and is based at the Birck Nanotechnology Center in Purdue's Discovery Park. The latest research is similar to, but fundamentally different from, research reported by Ye's group in 2009. That work involved a design called a finFET, for fin field-effect transistor, which uses a finlike structure instead of the conventional flat design. The new design uses nanowires instead of the fin design.